Misul

Thoughtful engineering

Systems software engineered for efficiency, optimization, and reliability.

Systematic optimization

Relentless pursuit of hardware-level efficiency, zero wasteful overhead, and disciplined resource stewardship across every layer.

Openness and sovereignty

Transparent, modular architectures that grant developers complete ownership and control without artificial lock-in.

Uncompromising reliability

Predictable execution and verified state under sustained load, designed to run indefinitely without degradation.

Disciplined scrutiny

Serious engineering held to uncompromising standards, where technical criticism is actively welcomed, accepted, and applied.

Misul Agent

In-house thoughtful engineer

An autonomous coding agent built on a native Zig harness. Engineered for deterministic tool execution, isolated memory arenas, and sustained context integrity during complex engineering tasks.

Misul Agent operates as a single native process with zero background daemons. Context state lives in linear memory arenas that reset per turn, preventing gradual memory leaks and state fragmentation across multi-hour development sessions.

Session history is structured into append-only, length-delimited binary journals. In the event of a crash or interruption, state reconstructs deterministically without unpredictable side effects or uncertain re-execution.

An extensible Zig capability harness enforces strict sandbox boundaries around tool dispatch, file mutations, and external process spawning, keeping every automated action explicit, verifiable, and safe.

Laplace

Inference engine implemented directly for native Apple Silicon

Built directly for Apple Silicon unified memory, featuring a universal model loader and extension system, a direct Metal compute backend, and in-register fused quant kernels.

Laplace is engineered specifically for Apple Silicon M-series unified memory architecture. By bypassing generic multi-platform runtime layers, it connects direct Metal compute pipelines directly to on-die high-bandwidth memory controllers.

A universal zero-copy loader supports GGUF, EXL3, and custom execution extensions with instant mmap residency, minimizing memory bandwidth pressure during initialization and multi-gigabyte weight streaming.

Quantized matrix execution is evaluated in-register using hand-tuned ARM NEON, DOTPROD, and I8MM SIMD assembly instructions, maintaining sustained token generation throughput with low thermal overhead.

Monodratic

Reproducible sparse attention mixer

Technical report

A state-space linear attention architecture achieving 0.9909 associative recall accuracy with learned non-bypass routing and finite-range scaling.

Monodratic introduces a stateless sparse attention mixer that overcomes the quadratic KV expansion bottleneck. Routed width 2 of 5 reaches 0.9909 mean accuracy on a three-seed associative-recall task with learned product routing.

Following rotary position embedding, product routing indexes keys into bounded causal posting lists. Remote memory blocks are selected without quadratic cache expansion, maintaining a packed timing exponent of 1.004 from 4K to 32K token sequence lengths.

Component tests: 429 passed
Associative recall: 0.9909 mean
Margin over random: +0.4297
Timing exponent: 1.004